The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2022

Filed:

Jul. 12, 2019
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Chenrong Xiong, San Jose, CA (US);

Fan Zhang, San Jose, CA (US);

Haobo Wang, San Jose, CA (US);

Xuanxuan Lu, San Jose, CA (US);

Meysam Asadi, San Jose, CA (US);

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/29 (2006.01); H03M 13/11 (2006.01);
U.S. Cl.
CPC ...
H03M 13/2975 (2013.01); H03M 13/1108 (2013.01); H03M 13/1117 (2013.01); H03M 13/1131 (2013.01);
Abstract

Memory controllers, decoders and methods to selectively perform bit-flipping (BF) decoding and min-sum (MS) decoding on codewords of an irregular low-density parity-check (LDPC) code. Bit-flipping (BF) decoding is executed with respect to variable nodes having relatively high column weights. MS decoding is executed with respect to variable nodes having relatively low column weights. A column-weight threshold is used to group the variable nodes into the higher and lower column weight groups. The two decoding techniques exchange results during the overall decoding process.


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