The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2022
Filed:
Nov. 27, 2019
Fujitsu Limited, Kawasaki, JP;
Toru Okabayashi, Akishima, JP;
FUJITSU LIMITED, Kawasaki, JP;
Abstract
An offset address generator generates a plurality of offset addresses at an interval of a basic processing unit size on the basis of an access destination address from a calculating circuit, partitions an access destination memory region from the calculating circuit to set a plurality of verification address ranges. A determiner sequentially determines whether the plurality of set verification address ranges are matched with a monitoring target address. With this configuration, it is possible to simplify the configuration of a debug function in a processor.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile