The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2022

Filed:

Jun. 05, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Jin-Woo Kim, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/4401 (2018.01); G06F 21/57 (2013.01); H04L 9/30 (2006.01); H04L 9/32 (2006.01); G06F 9/448 (2018.01); G06F 8/61 (2018.01);
U.S. Cl.
CPC ...
G06F 21/575 (2013.01); G06F 9/4401 (2013.01); G06F 9/4498 (2018.02); H04L 9/30 (2013.01); H04L 9/32 (2013.01); H04L 9/3236 (2013.01); H04L 9/3239 (2013.01); H04L 9/3247 (2013.01); G06F 8/63 (2013.01);
Abstract

A boot secure device that performs a secure booting operation of a semiconductor system includes an external memory interface that provides an interface with an external memory, a first internal memory that stores a boot image stored in the external memory, a second internal memory that stores a hash of a first public key, a secure accelerator that verifies the boot image using the hash of the first public key, and a secure boot sequencer that includes a plurality of states and a plurality of operation and that controls the external memory interface, the first internal memory, the second internal memory, and the secure accelerator using at least one of the plurality of operations when a state transition occurs between two of the plurality of states.


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