The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2022
Filed:
Oct. 17, 2019
Nippon Telegraph and Telephone Corporation, Tokyo, JP;
NIPPON TELEGRAPH AND TELEPHONE CORPORATION, Tokyo, JP;
Abstract
An optical line terminal (OLT) () includes an interface (I/F) board () configured to communicate with an external apparatus, a graphics processing unit (GPU) () configured to perform a first process, and a central processing unit (CPU) () configured to control the I/F board () and the GPU (). The CPU () includes a data processing execution unit configured to execute a second process, an external transfer control unit configured to perform a control process of transferring data received from the external apparatus from the I/F board () to the CPU () or the GPU () and a control process for transferring data to be transmitted to the external apparatus from the CPU () or the GPU () to the I/F board (), a data processing control unit configured to perform control for executing the first process of the GPU () and the second process of the CPU () on the data received from the external apparatus or the data to be transmitted to the external apparatus; and a processing result copy unit configured to perform control for outputting a processing result of the first process to the CPU () and designating the processing result of the first process as a processing target of the second process and control for outputting a processing result of the second process to the GPU () and designating the processing result of the second process as a processing target of the first process.