The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2022

Filed:

Sep. 23, 2020
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Jongryool Kim, San Jose, CA (US);

Hyung Jin Lim, San Jose, CA (US);

Miseon Han, San Jose, CA (US);

Myeong Joon Kang, San Jose, CA (US);

Suchang Kim, San Jose, CA (US);

Pui York Wong, San Jose, CA (US);

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 11/07 (2006.01); G11C 11/406 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 11/0781 (2013.01); G06F 11/1044 (2013.01); G06F 11/1076 (2013.01); G11C 11/40615 (2013.01);
Abstract

A host handles reliability management of memory systems. The host analyzes characteristics of data associated with a select memory system among the memory systems. The host determines a reliability control mode and one or more reliability schemes among reliability schemes to be applied to the select memory system based on the characteristics. The host provides reliability management information indicating the reliability control mode to the select memory system. The plurality of reliability schemes includes error correction code (ECC), read retry, intra redundancy and refresh schemes.


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