The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2022

Filed:

Jan. 07, 2020
Applicants:

No. 24 Research Institute of China Electronics Technology Group Corporation, Chongqing, CN;

Chongqing Gigachip Technology Co. Ltd., Chongqing, CN;

Inventors:

Mingyuan Xu, Chongqing, CN;

Liang Li, Chongqing, CN;

Jun Liu, Chongqing, CN;

Xiaofeng Shen, Chongqing, CN;

Jianan Wang, Chongqing, CN;

Dongbing Fu, Chongqing, CN;

Guangbing Chen, Chongqing, CN;

Xingfa Huang, Chongqing, CN;

Xi Chen, Chongqing, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01); H03K 19/0948 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31706 (2013.01); H03K 19/0948 (2013.01);
Abstract

The present disclosure provides a differential clock cross point detection circuit and a detection method. The detection circuit includes: a first MOS transistor (M), a second MOS transistor (M) and a capacitor (C); a drain of the first MOS transistor (M) is connected to a negative terminal (CLK−) of a differential clock, a gate of the first MOS transistor (M) is connected to a positive terminal (CLK+) of the differential clock, and a source of the first MOS transistor (M) is connected to a drain of the second MOS transistor (M); a gate of the second MOS transistor (M) is connected to the negative terminal (CLK−) of the differential clock, and a source of the second MOS transistor (M) is connected to an output terminal through a node; one terminal of the capacitor (C) is connected to a node (A), and the other terminal of the capacitor (C) is grounded.


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