The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2022

Filed:

Nov. 15, 2018
Applicant:

Sanyo Electric Co., Ltd., Daito, JP;

Inventors:

Kimihiko Furukawa, Hyogo, JP;

Masato Nishikawa, Hyogo, JP;

Kenji Motoyoshi, Hyogo, JP;

Noriharu Kobayashi, Hyogo, JP;

Yoshitaka Sakiyama, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B60L 58/22 (2019.01); G01R 31/388 (2019.01); B60L 58/12 (2019.01); H02J 7/00 (2006.01); H01M 10/42 (2006.01); H01M 10/44 (2006.01); H01M 10/48 (2006.01);
U.S. Cl.
CPC ...
B60L 58/22 (2019.02); B60L 58/12 (2019.02); G01R 31/388 (2019.01); H01M 10/425 (2013.01); H01M 10/441 (2013.01); H01M 10/482 (2013.01); H02J 7/0014 (2013.01); H02J 7/007182 (2020.01); H01M 2010/4271 (2013.01);
Abstract

Provided is a management device that manages a power storage module configured by connecting in series a plurality of parallel cell groups in which a plurality of cells are connected in parallel. In the management device, a voltage detection circuit detects a voltage of each of the plurality of parallel cell groups connected in series. A plurality of equalizing circuits are connected in parallel to the plurality of parallel cell groups, respectively. A controlling circuit controls the plurality of equalizing circuits based on the voltage detected by the voltage detection circuit and executes an equalizing process. The controlling circuit determines whether or not an abnormal cell is included in each of the parallel cell groups based on a voltage change of each of the parallel cell groups during discharging to the equalizing circuit or charging from the equalizing circuit.


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