The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2022

Filed:

Mar. 23, 2021
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Pablo Yelamos Ruiz, Hermosa Beach, CA (US);

Venkata Anand Prabhala, El Segundo, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); H03K 17/567 (2006.01); H02M 3/158 (2006.01); G05F 1/00 (2006.01); H03K 17/284 (2006.01); H03K 17/687 (2006.01); H02P 27/06 (2006.01); G01R 19/145 (2006.01); H03K 17/06 (2006.01);
U.S. Cl.
CPC ...
H03K 17/284 (2013.01); G01R 19/145 (2013.01); H02P 27/06 (2013.01); H03K 17/063 (2013.01); H03K 17/6871 (2013.01);
Abstract

A gate driver circuit includes at least one driver configured to generate a first gate control signal for a first power disconnect switch and a second gate control signal for a second power disconnect switch in parallel with the first power disconnect switch, and logic configured to implement a delayed turn on time for the second gate control signal compared to the first gate control signal such that the first power disconnect switch turns on before the second power disconnect switch when powering up a load coupled to the first and the second power disconnect switches. The gate driver circuit logic may also be configured to implement a delayed turn off time such that the first power disconnect switch turns off before the second power disconnect switch when powering down the load. Corresponding power conversion circuits, electronic systems, and methods of power disconnect switch control are also described.


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