The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 2022
Filed:
Jun. 28, 2019
Applicant:
Amazon Technologies, Inc., Seattle, WA (US);
Inventors:
Nishith Desai, Austin, TX (US);
Thomas A. Volpe, Austin, TX (US);
Assignee:
Amazon Technologies, Inc., Seattle, WA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/327 (2020.01); G06N 3/10 (2006.01); G06F 30/396 (2020.01); G06F 119/18 (2020.01);
U.S. Cl.
CPC ...
G06F 30/327 (2020.01); G06N 3/10 (2013.01); G06F 30/396 (2020.01); G06F 2119/18 (2020.01);
Abstract
Clock skew may be increased along a critical path of a systolic array. Pipelined registers may be added between a bus that provides input data signals to a systolic array and between a bus that receives output data signals from the systolic array. Skew circuitry for the pipelined registers may be implemented to delay a clock signal to the pipelined registries to allow a clock skew accumulated along a critical path of the systolic array to exceed a single clock cycle.