The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2022

Filed:

Mar. 10, 2020
Applicant:

Emc Ip Holding Company Llc, Hopkinton, MA (US);

Inventors:

Andrew Chanler, Berlin, MA (US);

Mathew Pilozzi, Hopedale, MA (US);

Assignee:

Dell Products L.P., Hopkinton, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G05B 11/42 (2006.01); G06F 12/0868 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G05B 11/42 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/7207 (2013.01);
Abstract

In a storage system that implements metadata paging, the page free pool is replenished in the background to reduce foreground evictions and associated latency on page-in. A two-level page eviction controller with cascaded proportional, integral, derivative (PID) controllers optimizes the size of the free page pool and optimizes the rate at which pages are freed in the background. By optimizing these two parameters the page eviction controller dynamically maximizes used pages (minimizing free pages) to increase the metadata cache hit ratio. Optimizing the parameters also reduces the chances of foreground page evictions, thereby reducing IO latency, during both steady state and burst page-in requests.


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