Sampling point identification for low frequency asynchronous data capture

Abstract

An asynchronous data capture device comprises an edge spread detector circuit, a clock generator, and a data sampling circuit. The edge spread detector circuit uses a first clock frequency that is a multiple of a second clock frequency, identifies transitions in a data stream transmitted to the device at the second clock frequency, and determines a sampling point based on the identified transitions. The clock generator adjusts a phase offset based on the sampling point and generates a clock signal having the second clock frequency and the adjusted phase offset. The data sampling circuit uses the second clock frequency and samples the data stream at the sampling point. In some implementations, the edge spread detector determines a sampling point that is isolated from the identified transitions, and the clock generator adjusts the phase offset to cause a rising edge at the sampling point.