The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2022

Filed:

Dec. 02, 2019
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Sang Heon Lee, Chungcheongbuk-do, KR;

Hyun Heo, Yongin-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01); H01L 27/11573 (2017.01); H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); H01L 27/11565 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11573 (2013.01); G11C 5/063 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01);
Abstract

A semiconductor memory device is provided. The semiconductor memory device includes a memory cell array disposed on a substrate, a bit line connected to the memory cell array, a peripheral circuit disposed between the memory cell array and the substrate, the peripheral circuit including a transistor, a conductive line disposed between the memory cell array and the transistor, a lower connection structure connecting the conductive line and the transistor, and two or more upper connection structures connecting the bit line and the conductive line, the two or more upper connection structures being spaced apart from each other.


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