The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2022

Filed:

Nov. 04, 2020
Applicants:

Electronics and Telecommunications Research Institute, Daejeon, KR;

University-industry Cooperation Group of Kyung Hee University, Yongin-si, KR;

Inventors:

Seungeon Moon, Daejeon, KR;

Bae Ho Park, Seoul, KR;

Sung-Min Yoon, Suwon-si, KR;

Seung Youl Kang, Daejeon, KR;

Jeong Hun Kim, Daejeon, KR;

Jiyong Woo, Daejeon, KR;

Jong Pil Im, Daejeon, KR;

Chansoo Yoon, Busan, KR;

Ji Hoon Jeon, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/11507 (2017.01); H01L 27/11504 (2017.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11507 (2013.01); H01L 27/11504 (2013.01); H01L 28/56 (2013.01); H01L 28/91 (2013.01); H01L 28/92 (2013.01);
Abstract

The present disclosure relates to a memory device, and more particularly, to a memory device including a substrate, a plurality of vertical structures disposed on the substrate and including insulation layers and lower electrodes, which are alternately laminated with each other, wherein the vertical structures are aligned in a first direction parallel to a top surface of the substrate and a second direction crossing the first direction, an upper electrode disposed on a top surface and side surfaces of each of the vertical structures, and a first dielectric layer disposed between the upper electrode and the vertical structures to cover the top surface and the side surfaces of each of the vertical structures. Here, the first dielectric layer includes a ferroelectric material.


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