The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2022

Filed:

Aug. 06, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Chad Albertson, Rochester, MN (US);

John Borkenhagen, Rochester, MN (US);

Scott D. Frei, Rochester, MN (US);

David G. Wheeler, Rochester, MN (US);

Mark S. Fredrickson, Rochester, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/36 (2006.01); G06K 9/62 (2022.01); G06N 3/08 (2006.01); G06N 3/04 (2006.01); G06F 30/20 (2020.01); G06F 30/30 (2020.01); G06V 10/82 (2022.01); G06F 30/3308 (2020.01);
U.S. Cl.
CPC ...
G06F 11/3692 (2013.01); G06F 11/3676 (2013.01); G06F 11/3688 (2013.01); G06F 30/20 (2020.01); G06F 30/30 (2020.01); G06F 30/3308 (2020.01); G06K 9/6256 (2013.01); G06K 9/6267 (2013.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01); G06V 10/82 (2022.01); G06N 3/084 (2013.01);
Abstract

Techniques for analysis of verification parameters and reduction of training data are provided. A plurality of test results is received, where each of the plurality of test results specifies a respective one or more parameters and a respective one or more events. A list of parameters used to stimulate computing logic is determined. Additionally, a plurality of relevant parameters is generated, corresponding to parameters in the list of parameters that have at least two distinct values specified in the plurality of test results. A plurality of training cases is generated based on the plurality of test results and the plurality of relevant parameters. Further, a neural network is generated for design verification of the computing logic based on the plurality of relevant parameters. The neural network is trained based on the plurality of training cases.


Find Patent Forward Citations

Loading…