The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2022
Filed:
Feb. 01, 2018
Applicant:
Michael Erich Vonbank, Llandudno, GB;
Inventor:
Michael Erich Vonbank, Llandudno, GB;
Assignee:
Other;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 13/40 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4282 (2013.01); G06F 11/076 (2013.01); G06F 11/0706 (2013.01); G06F 11/0793 (2013.01); G06F 13/4068 (2013.01); G06F 2213/0012 (2013.01);
Abstract
A method for enabling and disabling Port Error detection and customizing corresponding error count threshold values. The method allows for adjustment of signal error verification thresholds before a connected port signals a loss of connection due to corrupted characters detected during normal operation and initialization on an IEEE-1394 serial bus. Also, the method customizes the limits for a Loss of Synchronization transition and reduces the probability for Bus Resets. Further, the method provides for a more stable bus operation, which is critical for usage in tight-looped and low-latency control systems.