The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2022

Filed:

Oct. 19, 2020
Applicant:

Uniquify, Inc., San Jose, CA (US);

Inventors:

Jung Lee, San Jose, CA (US);

Venkat Iyer, Sunnyvale, CA (US);

Brett Murdock, San Jose, CA (US);

Assignee:

UNIQUIFY, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/362 (2006.01); H03L 7/10 (2006.01); G06F 13/16 (2006.01); H03L 7/081 (2006.01); G11C 29/02 (2006.01); H03L 7/08 (2006.01); G11C 8/18 (2006.01); H03K 5/133 (2014.01); H03K 5/14 (2014.01); G06F 13/42 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
G06F 13/3625 (2013.01); G06F 13/1689 (2013.01); G06F 13/4256 (2013.01); G11C 8/18 (2013.01); G11C 29/022 (2013.01); G11C 29/023 (2013.01); G11C 29/028 (2013.01); H03K 5/133 (2013.01); H03K 5/14 (2013.01); H03L 7/08 (2013.01); H03L 7/0812 (2013.01); H03L 7/10 (2013.01); H03K 2005/00019 (2013.01);
Abstract

A data interface circuit wherein calibration adjustments for data bit capture are made without disturbing normal system operation, is described. A plurality of DLL capture and delay circuits for sampling a trained optimal sampling point as well as leading and trailing sampling points are defined. A first stream of data bits is input to the data interface circuit and using a first calibration method, a first optimal sampling point for sampling the data bits input is established. A second stream of data bits is input to the data interface circuit during normal system operation. A second calibration method is performed that is different from the first, the second calibration method being performed whereby: at least one reference data path is established for sampling transition edges of the second stream of data bits input to the data interface during normal system operation.


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