The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2022

Filed:

Oct. 22, 2020
Applicant:

Dialog Semiconductor (Uk) Limited, London, GB;

Inventors:

Mark Childs, Swindon, GB;

Jens Masuch, Munich, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H03K 5/135 (2006.01); H02M 1/14 (2006.01); H02M 3/155 (2006.01);
U.S. Cl.
CPC ...
H02M 3/158 (2013.01); H02M 1/14 (2013.01); H02M 3/155 (2013.01); H03K 5/135 (2013.01);
Abstract

The clock input of a buck converter is delayed, preventing sub-harmonic oscillation. The function may be achieved by implementing a clock delay generation circuit, configured to delay a next clock pulse by an amount of time directly proportional to the most recent on time of the high-side switch for peak-mode current control, inversely proportional to the most recent on time of the low-side switch for peak-mode current control, inversely proportional to the most recent on time of the high-side switch for valley-mode current control, or inversely proportional to the clock minus the most recent on time of the high-side switch for valley-mode current control.


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Childs, Mark. (2022). Preventing sub-harmonic oscillation with clock delay compensation, in a dc-dc switching converter (U.S. Patent No. 11329561). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11329561

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