The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2022

Filed:

Jan. 04, 2018
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Ordos Yuansheng Optoelectronics Co., Ltd., Inner Mongolia, CN;

Inventors:

Lulu Ye, Beijing, CN;

Lei Yao, Beijing, CN;

Kai Zhang, Beijing, CN;

Dawei Shi, Beijing, CN;

Nana Gao, Beijing, CN;

Panpan Zhang, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1262 (2013.01); H01L 27/1218 (2013.01); H01L 27/1248 (2013.01); H01L 27/1288 (2013.01);
Abstract

An array substrate, its fabricating method, a display panel and a display device are disclosed. The method includes forming an active layer on a substrate, forming a gate layer on a side of the active layer facing or away from the substrate; forming an interlayer dielectric layer on a side of the active layer away from the substrate, which includes a first, second, third and fourth film stacked in this order in a direction away from the substrate; forming a via hole extending from the interlayer dielectric layer to the active layer; forming a source and drain layer on a side of the interlayer dielectric layer away from the substrate, and in a region not covered by the source and drain layer, removing the fourth film in the interlayer dielectric layer at a same time as forming the source and drain layer.


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