The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2022

Filed:

Aug. 19, 2020
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Sharon Graif, Zichron Yaakov, IL;

Sai Ganapathy Srinivasan, Bangalore, IN;

Navdeep Mer, Bangalore, IN;

Sriharsha Chakka, Bangalore, IN;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 13/40 (2006.01); G06F 1/08 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4291 (2013.01); G06F 1/08 (2013.01); G06F 13/409 (2013.01); G06F 13/4031 (2013.01); G06F 13/4068 (2013.01);
Abstract

The systems and methods for bus ownership in a system power management interface (SPMI) bus may include two or more masters on the SPMI bus, and bus ownership may be passed between masters. The current owner of the bus is responsible for providing a clock signal on the clock line of the SPMI bus. To avoid problems caused by ringing of the clock signal being sent on a conductor that exceeds the SPMI specification, the original master (from whom bus ownership is being transferred) holds the clock line of the SPMI bus at a logical low for a clock delay value that is based on conductor length.


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