The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2022

Filed:

Sep. 29, 2020
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Danny Tsung-Heng Wu, San Jose, CA (US);

David Tran, San Jose, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01);
Abstract

Some examples herein provide for protection of data on a data path in a memory system in an integrated circuit. In an example, an integrated circuit includes a bit checker circuit, an Error Correcting Code (ECC) encoder circuit, an ECC decoder circuit, and a check bit generation circuit. The bit checker circuit is configured to check write data based on write-path check bit(s). The ECC encoder circuit is configured to generate a write encoded ECC value based on the write data. The write encoded ECC value is to be written to the memory with the write data. The ECC decoder circuit is configured to decode a read encoded ECC value and check read data based on the read encoded ECC value. The read encoded ECC value and read data are read from the memory. The check bit generation circuit is configured to generate read-path check bit(s) from the read data.


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