The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2022

Filed:

Jun. 03, 2021
Applicant:

Sambanova Systems, Inc., Palo Alto, CA (US);

Inventors:

Fahim ur Rahman, Sunnyvale, CA (US);

Mahmood Khayatzadeh, Belmont, CA (US);

Zuxu Qin, Palo Alto, CA (US);

Jin-Uk Shin, San Jose, CA (US);

Assignee:

SambaNova Systems, Inc., Palo Alto, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2006.01); H03L 7/087 (2006.01); H03L 7/14 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0818 (2013.01); H03L 7/087 (2013.01); H03L 7/0814 (2013.01); H03L 7/0816 (2013.01); H03L 7/14 (2013.01);
Abstract

A clock stretcher includes a DLL that derives delayed versions of an input clock signal, and a combiner that cyclically selects the delayed versions to generate a modified clock signal. The DLL has a phase error because of its finite bandwidth. The clock stretcher measures the phase error and corrects for a glitch in the modified clock signal by using the phase error when phase selection wraparound occurs. The clock stretcher may operate from a power supply that has droops, without intervening voltage regulation.


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