The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2022
Filed:
Oct. 28, 2019
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventors:
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 23/48 (2006.01); H01L 25/18 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5381 (2013.01); H01L 23/3128 (2013.01); H01L 23/481 (2013.01); H01L 23/5383 (2013.01); H01L 24/06 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 25/18 (2013.01); H01L 2224/06515 (2013.01); H01L 2224/16148 (2013.01); H01L 2224/17515 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/73203 (2013.01);
Abstract
A system-in-package includes a redistributed line (RDL) structure, a first semiconductor chip, a second semiconductor chip, and a bridge die. The RDL structure includes a first RDL pattern to which a first chip pad of the first semiconductor chip is electrically connected. The second semiconductor chip is stacked on the first semiconductor chip such that the second semiconductor chip protrudes past a side surface of the first semiconductor chip, wherein a second chip pad disposed on the protrusion is electrically connected to the first RDL pattern through the bridge die.