The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2022
Filed:
May. 22, 2020
International Business Machines Corporation, Armonk, NY (US);
Tharunachalam Pindicura, Austin, TX (US);
Shricharan Srivatsan, Austin, TX (US);
Vivek Britto, Austin, TX (US);
Yan Xia, Austin, TX (US);
Aishwarya Dhandapani, Folson, CA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method, system and computer program product are disclosed for reducing the memory load time for logic simulator. In an embodiment, the method comprises identifying a memory for a program, and selectively loading onto a logic simulator parts of the memory that are pre-determined as parts of the memory that will be accessed by the program when the program is executed on the simulator. In an embodiment, the selectively loading onto a logic simulator parts of the memory includes pre-determining subsets of the memory that will be accessed by the program when the program is executed on the simulator, and loading the pre-determined subsets of the memory on the simulator. In an embodiment, the pre-determining subsets of the memory includes using addresses of the memory that are accessed by the program when the program is executed on a computer system, to create the pre-determined subsets of the memory.