The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2022

Filed:

Jun. 15, 2020
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Rubin Ajit Parekhji, Bangalore, IN;

Mahesh M. Mehendale, Bangalore, IN;

Vinod Menezes, Bangalore, IN;

Vipul K. Singhal, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 33/00 (2006.01); G01R 31/28 (2006.01); G01R 31/3185 (2006.01); G01R 1/04 (2006.01); G01R 1/067 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2834 (2013.01); G01R 1/0416 (2013.01); G01R 1/06711 (2013.01); G01R 31/2886 (2013.01); G01R 31/318511 (2013.01);
Abstract

In a method of testing a semiconductor wafer, a probe tip contacts a pad in a scribe line space between facing sides of first and second dies. The probe tip is electrically coupled to an automated test equipment (ATE). The second die is spaced apart from the first die. The scribe line space includes an interconnect extending along at least an entire length of the facing sides of the first and second dies. The pad is electrically coupled through the interconnect to at least one of the first or second dies. With the ATE, circuitry is tested in at least one of the first or second dies. The pad is electrically coupled through the interconnect to the circuitry.


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