The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2022

Filed:

Aug. 05, 2021
Applicant:

Centripetal Networks, Inc., Portsmouth, NH (US);

Inventors:

Richard Goodwin, York, ME (US);

Paul Sprague, North Berwick, ME (US);

Peter Geremia, Portsmouth, NJ (US);

Sean Moore, Hollis, NH (US);

Assignee:

Centripetal Networks, Inc., Portsmouth, NH (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/12 (2006.01); H04L 61/2521 (2022.01); H04L 61/2514 (2022.01); H04L 45/00 (2022.01); H04L 101/668 (2022.01); H04L 101/622 (2022.01);
U.S. Cl.
CPC ...
H04L 61/2528 (2013.01); H04L 45/68 (2013.01); H04L 61/2514 (2013.01); H04L 61/6022 (2013.01); H04L 61/6068 (2013.01);
Abstract

Network devices that are inserted inline into network links and process in-transit packets may significantly improve their packet-throughput performance by not assigning L3 IP addresses and L2 MAC addresses to their network interfaces and thereby process packets through a logical fast path that bypasses the slow path through the operating system kernel. When virtualizing such Bump-In-The-Wire (BITW) devices for deployment into clouds, the network interfaces must have L3 IP and L2 MAC addresses assigned to them. Thus, packets are processed through the slow path of a virtual BITW device, significantly reducing the performance. By adding new logic to the virtual BITW device and/or configuring proxies, addresses, subnets, and/or routing tables, a virtual BITW device can process packets through the fast path and potentially improve performance accordingly. For example, the virtual BITW device may be configured to enforce a virtual path (comprising the fast path) through the virtual BITW device.


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