The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2022
Filed:
Dec. 02, 2020
Applicant:
Centaur Technology, Inc., Austin, TX (US);
Inventor:
David Stachelski, Austin, TX (US);
Assignee:
CENTAUR TECHNOLOGY, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/197 (2006.01); H03L 7/093 (2006.01); H04B 1/69 (2011.01); H03L 7/099 (2006.01); H03L 7/089 (2006.01);
U.S. Cl.
CPC ...
H03L 7/1976 (2013.01); H03L 7/0895 (2013.01); H03L 7/093 (2013.01); H03L 7/099 (2013.01); H04B 1/69 (2013.01);
Abstract
In one embodiment, a spread spectrum clock generator, comprising a digital delta sigma modulator coupled to a fractional N, phase locked loop (PLL), the PLL comprising a discrete-time capacitance multiplier loop filter, the discrete-time capacitance multiplier loop filter comprising: an amplifier comprising a non-inverting input and an inverting input; a first switched capacitor resistor and a capacitor coupled to the non-inverting input, the capacitor coupled between the first switched capacitor resistor and the non-inverting input; and a second switched capacitor resistor coupled to the inverting input.