The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2022

Filed:

Feb. 22, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Rishi Soundararajan, Bengaluru, IN;

Visvesvaraya Pentakota, Bengaluru, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/24 (2006.01); H03M 1/50 (2006.01); H03K 5/00 (2006.01); H03M 1/36 (2006.01); H03M 1/46 (2006.01); H03M 1/48 (2006.01);
U.S. Cl.
CPC ...
H03K 5/249 (2013.01); H03M 1/50 (2013.01); H03K 2005/00215 (2013.01); H03M 1/36 (2013.01); H03M 1/46 (2013.01); H03M 1/48 (2013.01);
Abstract

An analog to digital converter (ADC) comprising: a delay circuit having a complementary signal output; a first comparator having an input coupled to the complementary signal output of the delay circuit, the first comparator having a first output and a second output; a first dummy comparator having a first dummy input coupled to the first output and a second dummy input coupled to the second output, the first dummy comparator having a dummy output; a first interpolation comparator having an interpolation output and a first interpolation input coupled to the first output; a second dummy comparator having an input coupled to the interpolation output; and a second interpolation comparator having a second interpolation input and a third interpolation input, the second interpolation input coupled to the interpolation output and the third interpolation input coupled to the dummy output.


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