The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2022

Filed:

Feb. 06, 2020
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Kei Takahashi, Kanagawa, JP;

Yoshifumi Tanada, Tochigi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); G05F 1/46 (2006.01); H03F 3/45 (2006.01); G05F 1/56 (2006.01); H03F 1/34 (2006.01); H02M 3/156 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0211 (2013.01); G05F 1/468 (2013.01); G05F 1/56 (2013.01); H03F 1/0261 (2013.01); H03F 1/342 (2013.01); H03F 3/45183 (2013.01); H02M 3/156 (2013.01); H03F 2203/45244 (2013.01); H03F 2203/45506 (2013.01); H03F 2203/45702 (2013.01);
Abstract

Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced.


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