The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2022
Filed:
Jul. 30, 2019
Infineon Technologies Ag, Neubiberg, DE;
Ulrich Glaser, Putzbrunn, DE;
Infineon Technologies AG, Neubiberg, DE;
Abstract
A circuit for preventing failure of a device includes a first rail, electrostatic discharge (ESD) protection circuitry, a second rail, an ESD switching circuitry, biasing circuitry, and a signal limiter. The first rail is for one or more first electrical components formed in a first portion of a substrate. The second rail is for one or more second electrical components formed in a second portion of the substrate. The first portion of the substrate forms an emitter of a parasitic transistor and the second portion of the substrate forms a collector of the parasitic transistor. The biasing circuitry is configured to output a bias voltage at the emitter of the parasitic transistor when the ESD switching circuitry is switched on. The signal limiter electrically couples to the first rail and the emitter of the parasitic transistor.