The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2022

Filed:

Feb. 27, 2020
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Yun Je Ji, Suwon-si, KR;

Tae Seong Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 23/49811 (2013.01); H01L 23/5381 (2013.01); H01L 23/5383 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 25/0655 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/1703 (2013.01);
Abstract

A package substrate, including a substrate, a first structure disposed on the substrate and having a first through-portion, a first wiring layer disposed in the first through-portion on the substrate, a first insulating layer disposed in the first through-portion on the substrate and covering at least a portion of the first wiring layer, and a second wiring layer disposed on the first insulating layer, and a multi-chip package, including the package substrate, are provided.


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