The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2022

Filed:

Jun. 05, 2020
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventors:

Isamu Nishimura, Kyoto, JP;

Hirofumi Takeda, Kyoto, JP;

Hideaki Yanagida, Kyoto, JP;

Taro Hayashi, Kyoto, JP;

Natsuki Sakamoto, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 23/498 (2006.01); H01L 23/48 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 43/04 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49866 (2013.01); H01L 21/486 (2013.01); H01L 23/481 (2013.01); H01L 23/49827 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 43/04 (2013.01); H01L 2224/10175 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/81395 (2013.01); H01L 2224/81455 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/12041 (2013.01);
Abstract

A semiconductor device includes: a substrate including a main surface; a wiring portion including a first conductive layer formed on the main surface, and a first plating layer which is provided on the first conductive layer and on which an oxide film is formed; a semiconductor element including an element mounting surface and an element electrode formed on the element mounting surface; a bonding portion including a second plating layer made of the same material as the first plating layer and laminated on the first conductive layer, and a solder layer laminated on the second plating layer and bonded to the element electrode; and a sealing resin covering the semiconductor element.


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