The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2022
Filed:
Nov. 19, 2018
Katholieke Universiteit Leuven, Leuven, BE;
Ecole Polytechnique Fédérale DE Lausanne (Epfl), Lausanne, CH;
Università Della Svizzera Italiana, Lugano, CH;
KATHOLIEKE UNIVERSITEIT LEUVEN, Leuven, BE;
UNIVERSITÀ DELLA SVIZZERA ITALIANA, Lugano, CH;
ECOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE (EPFL), Lausanne, CH;
Abstract
A reconfigurable logic circuit comprises first, second and third switching circuits arranged for receiving first, second and third input bits, respectively, and each arranged for being configured in a mode wherein the corresponding input bit is passed on or in a mode; a first exclusive OR logic block operable on the outputs of the first, second and third switching circuits and arranged to output a sum bit; fourth, fifth and sixth switching circuits arranged for receiving a fourth, fifth and sixth input bits and arranged for being configured in a mode; first, second and third AND logic blocks, each arranged for receiving a different pair of the outputs of certain switching circuits; a second exclusive OR logic block operable on the outputs of certain AND logic blocks and arranged to produce a carry output bit.