The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2022

Filed:

Sep. 01, 2020
Applicant:

Kioxia Corporation, Minato-ku, JP;

Inventors:

Takehisa Kurosawa, Yokohama, JP;

Koichi Shinohara, Fujisawa, JP;

Yusuke Tanefusa, Yokohama, JP;

Assignee:

Kioxia Corporation, Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/44 (2006.01); G11C 29/12 (2006.01); G11C 29/42 (2006.01); G11C 29/14 (2006.01);
U.S. Cl.
CPC ...
G11C 29/44 (2013.01); G11C 29/12015 (2013.01); G11C 29/14 (2013.01); G11C 29/42 (2013.01); G11C 2029/4402 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes a memory cell array, a processing circuit, a timer, a command decoder, and a training circuit. The memory cell array includes a plurality of memory cells. The processing circuit writes data into the memory cell array. The timer sets a waiting time. The command decoder receives a command output from a memory controller. The training circuit waits until the waiting time has passed since a predetermined command is received by the command decoder and performs a process relating to determination of a correction value for a signal sent from the memory controller to the processing circuit based on reference data output from the memory controller after the waiting time has passed.


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