The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2022

Filed:

Dec. 02, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hundae Choi, Hwaseong-si, KR;

Garam Choi, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); H03L 7/081 (2006.01); H03L 7/085 (2006.01); G11C 8/10 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G11C 7/1057 (2013.01); G11C 7/22 (2013.01); G11C 7/225 (2013.01); G11C 7/227 (2013.01); G11C 8/10 (2013.01); H03L 7/085 (2013.01); H03L 7/0816 (2013.01); G11C 2207/2272 (2013.01); G11C 2207/2281 (2013.01);
Abstract

A delay locked loop circuit and a semiconductor memory device are provided. The delay locked loop circuit includes a phase detection and delay control circuit configured to detect a phase difference between a first internally generated clock signal the feedback clock signal to generate a first phase difference detection signal in response to a first selection signal being activated, to detect a phase difference between a second internally generated clock signal and the feedback clock signal to generate a second phase difference detection signal in response to a second selection signal being activated, and to change a code value in response to the first phase difference detection signal or the second phase difference detection signal.


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