The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2022

Filed:

Dec. 16, 2019
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Shuhei Yokoyama, Tokyo, JP;

Seiya Sugimachi, Tokyo, JP;

Maki Hasegawa, Tokyo, JP;

Kosuke Yamaguchi, Tokyo, JP;

Shogo Shibata, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/56 (2006.01); H01L 23/522 (2006.01); H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 21/768 (2013.01); H01L 21/565 (2013.01); H01L 23/3157 (2013.01); H01L 23/522 (2013.01);
Abstract

A method for manufacturing a semiconductor device according to the present invention includes the steps of (a) preparing a lead frame including a power chip die pad to which two terminals are connected, a control element die pad to which one terminal is connected, and tie bar portions connecting between a plurality of terminals including the two terminals, (b) placing a power chip and a free wheel diode on the power chip die pad and placing ICs on the control element die pad, (c) encapsulating in a mold resin to allow the tie bar portions to be exposed outside and a plurality of terminals including the two terminals and the one terminal to protrude outward, and (d) removing the tie bar portions other than the tie bar portions connecting the two terminals.


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