The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2022

Filed:

Jul. 17, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Chulung Kim, Seoul, KR;

Joungyeal Kim, Yongin-si, KR;

Seongheon Yu, Suwon-si, KR;

Hyunjin Ko, Yongin-si, KR;

Wooil Kim, Yongin-si, KR;

Hyeonsoo Sim, Uijeongbu-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/4093 (2006.01); G11C 11/4096 (2006.01); G06F 13/40 (2006.01); G06F 13/16 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4093 (2013.01); G06F 13/1668 (2013.01); G06F 13/4086 (2013.01); G11C 11/4096 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01);
Abstract

In a method of controlling on-die termination (ODT) in a memory system including a plurality of memory units that shares a data bus to transfer data, ODT circuits of the plurality of memory units are enabled into an initial state, a resistance value of the ODT circuit is set to a first resistance value, of at least one write non-target memory unit among the plurality of memory units during a write operation on a write target memory unit among the plurality of memory units, and a resistance value of the ODT circuit is set to a second resistance value, of at least one read non-target memory unit among the plurality of memory units during a read operation on a read target memory unit among the plurality of memory units.


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