The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2022

Filed:

Apr. 30, 2020
Applicant:

Marvell Asia Pte, Ltd. (Registration No. 199702379m), Singapore, SG;

Inventors:

Chia-Hsin Chen, Santa Clara, CA (US);

Avinash Sodani, San Jose, CA (US);

Ulf Hanebutte, Gig Harbor, WA (US);

Rishan Tan, San Jose, CA (US);

Soumya Gollamudi, San Jose, CA (US);

Assignee:

Marvell Asia Pte Ltd, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/499 (2006.01); G06F 9/30 (2018.01); G06F 7/485 (2006.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3001 (2013.01); G06F 7/485 (2013.01); G06F 7/49905 (2013.01); G06F 9/3865 (2013.01);
Abstract

A method includes receiving an input data at a FP arithmetic operating unit configured to perform a FP arithmetic operation on the input data. The method further includes determining whether the received input data generates a FP hardware exception responsive to the FP arithmetic operation on the input data, wherein the determining occurs prior to performing the FP arithmetic operation. The method also includes converting a value of the received input data to a modified value responsive to the determining that the received input data generates the FP hardware exception, wherein the converting eliminates generation of the FP hardware exception responsive to the FP arithmetic operation on the input data.


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