The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2022

Filed:

Aug. 24, 2020
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventor:

Anton Willem Roodnat, Enspijk, NL;

Assignee:

QORVO US, INC., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/093 (2006.01); H03L 7/099 (2006.01); H03L 7/081 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H03L 7/093 (2013.01); H03L 7/081 (2013.01); H03L 7/091 (2013.01); H03L 7/0991 (2013.01);
Abstract

The present disclosure relates to a digital subsampling phase-locked-loop (PLL) with a digital-to-time converter (DTC) based successive-approximation-register (SAR) phase estimation. This disclosed PLL utilizes a DTC and a one-bit sampler to generate one phase word by calculating multiple one-bit phase measurements with a SAR algorithm. The one phase word, which indicates the phase estimation of a radio frequency (RF) output signal compared to a reference signal, enables the PLL to lock the RF output signal with the reference signal in a short settling time. In addition, utilizing the one-bit sampler instead of a conventional frequency divider is good for linearity and low power consumption of the PLL without introducing significant noise in the RF output signal.


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