The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2022

Filed:

Jun. 30, 2020
Applicants:

Hung-cheng Lin, New Taipei, TW;

Hung-kuang Hsu, Taipei, TW;

Hua-chen Hsu, Zhubei, TW;

Inventors:

Hung-Cheng Lin, New Taipei, TW;

Hung-Kuang Hsu, Taipei, TW;

Hua-Chen Hsu, Zhubei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/14 (2010.01); H01L 25/075 (2006.01); H01L 25/16 (2006.01); H01L 33/00 (2010.01); H01L 33/38 (2010.01);
U.S. Cl.
CPC ...
H01L 33/145 (2013.01); H01L 25/0753 (2013.01); H01L 25/167 (2013.01); H01L 33/0095 (2013.01); H01L 33/0093 (2020.05); H01L 33/382 (2013.01);
Abstract

A diode array is provided. The diode array includes a substrate and a plurality of light emitting diodes disposed on the substrate and arranged in an array, wherein each of the light emitting diodes includes a stack of functional layers comprising a first type semiconductor layer, a second type semiconductor layer, and a light emitting layer located between the first type semiconductor layer and the second type semiconductor layer, wherein at least one of the light emitting diodes includes: a first current limiting region abutting a vertically extending boundary of the second semiconductor layer; wherein, with respect to a top down view, the first current limiting region is formed about an outer edge of the light emitting diode and an outer perimeter of the first current limiting region is equal to or less than 400 micrometers (μm).


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