Semiconductor memory device and manufacturing method of semiconductor memory device

Abstract

According to one embodiment, a semiconductor memory device includes conductive layers stacked at intervals and extending from a memory cell array region to a contact region. The contact region includes a staircase contact region and a staircase connection region. The staircase contact region includes a descending step contact region with steps descending in a first direction away from the memory cell array region and an ascending step contact region with steps ascending in the first direction, and the descending step contact region and the ascending step contact region include terrace faces provided with respective contacts connected thereto. The staircase connection region includes conductive layers formed of layers same as conductive layers connected to the contacts of the ascending step contact region.