The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2022

Filed:

Apr. 03, 2019
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Thomas Aichinger, Faak am See, AT;

Gerald Rescher, Bruckl, AT;

Michael Stadtmueller, Villach, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 21/02 (2006.01); H01L 21/04 (2006.01); H01L 29/16 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 21/049 (2013.01); H01L 21/02164 (2013.01); H01L 21/02271 (2013.01); H01L 21/02337 (2013.01); H01L 29/1033 (2013.01); H01L 29/1608 (2013.01); H01L 29/401 (2013.01); H01L 29/66068 (2013.01); H01L 29/78 (2013.01);
Abstract

A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.


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