The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2022
Filed:
Apr. 01, 2019
Applicant:
Siliconix Incorporated, San Jose, CA (US);
Inventors:
M. Ayman Shibib, San Jose, CA (US);
Kyle Terrill, San Jose, CA (US);
Assignee:
Vishay Siliconix, LLC, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/683 (2006.01); H01L 29/04 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02381 (2013.01); H01L 21/02532 (2013.01); H01L 21/02576 (2013.01); H01L 21/02634 (2013.01); H01L 21/02664 (2013.01); H01L 21/6835 (2013.01); H01L 29/045 (2013.01); H01L 29/66734 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68381 (2013.01);
Abstract
A method of fabricating semiconductor devices including epitaxially depositing a heavily doped substrate layer that is substantially free of crystalline defects on a lightly doped virtual substrate. The device regions of the semiconductor devices can be fabricated about the heavily doped substrate layer before the lightly doped virtual substrate is removed.