The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2022
Filed:
Jun. 30, 2020
Western Digital Technologies, Inc., San Jose, CA (US);
Jonas Goode, Lake Forest, CA (US);
Richard Galbraith, Rochester, MN (US);
Henry Yip, Bellflower, CA (US);
Idan Alrod, Herzliya, IL;
Eran Sharon, Rishon Lezion, IL;
WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US);
Abstract
A controller utilizes dual sense bin balancing (DSBB) to adjust a read level between memory states of an array of NAND flash memory cells. One or more iterations of DSBB may be performed to provide a read level. Each iteration of the DSBB includes performing a first sense read, performing a second sense read, determining a read error, and adjusting the initial read level. The first sense read is performed at a first offset of an initial read level of memory cells. The second sense read is performed at a second offset of the initial read level of memory cells. A read error is determined from the first sense read and the second sense read. The read level is adjusted by the read error. A read of the randomized data pattern is conducted with the adjusted read level of a last iteration of the DSBB.