The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2022

Filed:

Jul. 31, 2020
Applicants:

Qualcomm Incorporated, San Diego, CA (US);

Candace Sachi Chun, San Diego, CA (US);

Inventors:

Jungwon Suh, San Diego, CA (US);

Michael Hawjing Lo, San Diego, CA (US);

Dexter Tamio Chun, San Diego, CA (US);

Xavier Loic Leloup, San Diego, CA (US);

Laurent Rene Moll, San Jose, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 11/4074 (2006.01); G11C 11/409 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4074 (2013.01); G11C 11/409 (2013.01);
Abstract

Methods and apparatuses for to memories using dynamic voltage scaling are presented. The apparatus includes memory configured to communicate with a host. The memory includes a peripheral portion and a memory array. The memory is further configured to receive, from at least one power management circuit, a first supply voltage and a second supply voltage. The memory further includes a switch circuit. The switch circuit is configured to selectively provide the first supply voltage and the second supply voltage to the peripheral portion. The first supply voltage is static and has a first voltage range. The second supply voltage has a low second voltage range and a high second voltage range.


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