The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2022

Filed:

May. 12, 2020
Applicant:

Johnstech International Corporation, Minneapolis, MN (US);

Inventor:

Jeffrey Sherry, Savage, MN (US);

Assignee:

JOHNSTECH INTERNATIONAL CORPORATION, Minneapolis, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); H01Q 1/40 (2006.01); H01Q 1/22 (2006.01); G01R 31/319 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2822 (2013.01); G01R 31/31905 (2013.01); H01Q 1/2283 (2013.01); H01Q 1/405 (2013.01);
Abstract

A testing system and method for testing integrated circuits with radio frequency (RF) antennas is disclosed. The system includes an alignment plate for receiving a device under test (DUT) having an RF transmitting antenna, an enclosure surrounding but separated from the transmitting antenna, a receiving antenna in a telescopic enclosure, and a conversion circuit connected to the receiving antenna. The conversion circuit is configured to convert an RF output from the DUT to a direct current (DC) voltage. The DC voltage is used as a proxy for the RF output to test the DUT. When testing chips with RF ports, the chip or ports are surrounded by the enclosure which is non-radio reflective and includes antennas for receiving RF outputs disbursed around the enclosure, or a single antenna. If multiple receiving antennas are used, sequential testing can also detect directional transmission patterns to confirm that the direction is correctly calibrated.


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