The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2022

Filed:

May. 25, 2021
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Niravkumar Patel, San Jose, CA (US);

Amitava Majumdar, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); H03K 5/156 (2006.01); H03K 19/173 (2006.01); H03K 5/05 (2006.01); H03K 5/24 (2006.01); G06F 1/08 (2006.01);
U.S. Cl.
CPC ...
H03K 5/156 (2013.01); G06F 1/08 (2013.01); H03K 5/05 (2013.01); H03K 5/249 (2013.01); H03K 19/1737 (2013.01);
Abstract

An integrated circuit can include one or more clock controllers. Each clock controller corresponds to a different clock signal of a set of one or more clock signals of the integrated circuit. Each clock controller is configured to implement a clock stretch mode that generates a modified clock signal having a frequency that is less than the clock signal. The integrated circuit can include a trigger circuit configured to enable selected ones of the one or more clock controllers to implement the clock stretch mode. The trigger circuit and the one or more clock controllers are hardwired and are programmable using control infrastructure circuitry of the integrated circuit.


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