The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2022

Filed:

Jan. 07, 2020
Applicant:

Helios Bioelectronics Inc., Zhubei, TW;

Inventors:

Cheng-Che Lee, Zhubei, TW;

Lin-Chien Chen, Zhubei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/461 (2006.01); H01L 29/40 (2006.01); H01L 21/306 (2006.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/308 (2006.01); H01L 29/06 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/30604 (2013.01); H01L 21/02603 (2013.01); H01L 21/265 (2013.01); H01L 21/308 (2013.01); H01L 21/31144 (2013.01); H01L 29/0669 (2013.01);
Abstract

Present disclosure provides a method for multi-level etch. The method includes providing a substrate, forming a first reference feature over a control region of the substrate, forming an etchable layer over the first reference feature and a target region over the substrate, patterning a masking layer over the etchable layer, the masking layer having a first opening projecting over the control region and a second opening projecting over the target region, and removing a portion of the etchable layer through the first opening and the second opening until the first reference feature is reached. A semiconductor sensing device manufactured by the multi-level etch is also disclosed.


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