The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2022

Filed:

Sep. 25, 2020
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Nikhil Nandkishor Devshatwar, Bangalore, IN;

Shravan Karthik, Bangalore, IN;

Santhana Bharathi N, Tamil Nadu, IN;

Subhajit Paul, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/08 (2006.01); G06F 11/07 (2006.01); H04L 12/40 (2006.01); H04L 67/1034 (2022.01); H04L 67/1008 (2022.01); H04L 43/0852 (2022.01); H04L 43/0817 (2022.01); H04L 43/045 (2022.01); H04L 67/12 (2022.01); G06F 9/50 (2006.01); G06T 15/00 (2011.01); H04L 43/16 (2022.01); H04L 69/40 (2022.01);
U.S. Cl.
CPC ...
H04L 67/1034 (2013.01); G06F 9/50 (2013.01); G06F 11/0793 (2013.01); G06T 15/005 (2013.01); H04L 12/40202 (2013.01); H04L 43/045 (2013.01); H04L 43/0817 (2013.01); H04L 43/0852 (2013.01); H04L 43/16 (2013.01); H04L 67/1008 (2013.01); H04L 67/12 (2013.01); H04L 69/40 (2013.01); H04L 2012/40215 (2013.01);
Abstract

A fail-safe system for a cluster application is disclosed. The system includes a first subsystem comprising a graphic processing unit (GPU) that executes a high-level operating system renders a first set of parameter data, and a second subsystem that executes a real-time operating system and renders a second set of parameter data. The system also includes a controller area network connected to a parameter data source input and to the first subsystem and the second subsystem. The system further includes a quality of service (QoS) switch executing a QoS monitor module that decides to display the first set of parameter data being rendered by the first subsystem or the second set of parameter data being rendered by the second subsystem depending on an availability and load of the first subsystem as determined by a lag and a stability threshold. The system further includes a display connected to the QoS switch.


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