The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2022
Filed:
Feb. 15, 2019
National Institute of Advanced Industrial Science and Technology, Tokyo, JP;
Fuji Electric Co., Ltd., Kanagawa, JP;
Mitsubishi Electric Corporation, Tokyo, JP;
Ryoji Kosugi, Ibaraki, JP;
Kazuhiro Mochizuki, Tokyo, JP;
Kohei Adachi, Tokyo, JP;
Manabu Takei, Kanagawa, JP;
Yoshiyuki Yonezawa, Ibaraki, JP;
NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, Tokyo, JP;
FUJI ELECTRIC CO., LTD., Kawasaki, JP;
MITSUBISHI ELECTRIC CORPORATION, Tokyo, JP;
Abstract
A semiconductor device that includes a SiC semiconductor substrate; a SiC epitaxial layer having an impurity concentration lower than that of the SiC semiconductor substrate; a first semiconductor layer including first semiconductor pillars and second semiconductor pillars; a second semiconductor layer; a device active region; a termination region; a channel stopper region having an impurity concentration higher than that of the SiC epitaxial layer; and a plurality of first chip end portions and a plurality of second chip end portions, and a surface of the first side surface is covered with an impurity region having an impurity concentration higher than those of the first semiconductor pillar and the SiC epitaxial layer and is connected to the channel stopper region.