The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2022

Filed:

Nov. 17, 2020
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventor:

Hiromasa Tsuboi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01T 1/20 (2006.01); H01L 27/146 (2006.01); G01S 17/10 (2020.01); G01S 17/931 (2020.01); G01T 1/24 (2006.01); A61B 6/03 (2006.01); H01L 31/107 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1461 (2013.01); A61B 6/037 (2013.01); G01S 17/10 (2013.01); G01S 17/931 (2020.01); G01T 1/2018 (2013.01); G01T 1/24 (2013.01); H01L 27/1464 (2013.01); H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/14645 (2013.01); H01L 27/14663 (2013.01); H01L 31/107 (2013.01);
Abstract

A photoelectric conversion apparatus includes a semiconductor substrate, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, an embedded electrode, and an insulation member arranged between the embedded electrode and the first semiconductor region and the second semiconductor region. A deepest portion of the embedded electrode is arranged at a position deeper than a p-n junction surface of the first semiconductor region and the second semiconductor region. A potential difference between the first semiconductor region and the second semiconductor region is a potential difference at which avalanche multiplication does not occur, and a potential difference between the embedded electrode and the second semiconductor region is a potential difference at which avalanche multiplication occurs.


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